Valeria Bertacco Livres

Focusing on advanced methods in hardware verification, this book explores symbolic simulation as a powerful technique for ensuring the reliability of complex systems. It delves into the challenges of scalability in verification processes and presents innovative solutions to enhance efficiency. The text is designed for engineers and researchers, providing practical insights and methodologies that bridge theoretical concepts with real-world applications. Through detailed examples, it aims to improve the understanding and implementation of symbolic simulation in hardware verification.

This book constitutes the refereed proceedings of the 9th International Haifa Verification Conference, HVC 2013, held in Haifa, Israel in November 2013. The 24 revised full papers presented were carefully reviewed and selected from 49 submissions. The papers are organized in topical sections on SAT and SMT-based verification, software testing, supporting dynamic verification, specification and coverage, abstraction and model presentation.